Because cryptographic operations are computation-intensive, some computers offload these operations to a dedicated co-processor. For example, Intel® Corporation (San Jose, Calif.) offers the Cave Creek chip set for use with its Xeon® processors. The Cave Creek chips include hardware accelerators for cryptography, compression and pattern matching.
Some network cryptographic solutions use a “bump-in-the-wire approach.” This term is defined in Request for Comments (RFC) 4949 of the Internet Engineering Task Force (IETF) as an implementation approach that places a network security mechanism outside of the system that is to be protected. For example, IPsec, a standard security architecture for the Internet Protocol (IP), can be implemented outboard, in a physically separate device, so that the system that receives the IPsec protection does not need to be modified. Military-grade link encryption is also sometimes implemented in bump-in-the-wire devices.